riscv

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It was only a matter of time, perhaps, but the skyrocketing costs of designing chips is colliding with the ever-increasing need for performance,

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The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux - openhwgroup/cva6

A post that discusses what RISC-V is and why it’s important, teaches readers how to install the GNU RISC-V toolchain, and walks through building and running a simple C program on emulated RISC-V hardware.

A post describing how C programs get to the main function. Devicetree layouts, linker scripts, minimal C runtimes, GDB and QEMU, basic RISC-V assembly, and other topics are reviewed along the way.