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Soft error resilience mechanisms - GPU register files (ArXiV)

Clock tree design (Freescale)

Device Architectures, 5nm and beyond (Nadine Collaert, Semicon Taiwan 2016)
Intro
Beyond FinFETs
High Mobility Materials
New Switching Mechanisms
Summary

Power Management via Reinforcement Learning (DAC 2011)
Intro
Theory (semi-Markov decision process = SMDP)
System Model
Results
Conclusion

Power Management via Reinforcement Learning (DAC 2011)
Intro
Soft-Edge Flip Flop (SEFF) Pipelines
Near-Threshold Regime
Optimization
Experimental Results
Conclusion

Performance: 7nm FinFETs vs Conventional Bulk CMOS
Intro
7nm FinFET Technology Description
Standard Cell Library Characterization
Power Consumption
Synthesis Results
Conclusion