The MIPS R4000, part 9: Stupid branch delay slot tricks
Technically legal, but strange.
semiconductors
SaaS for component pricing: Q&A with Lytica chairman Ken Bradley
How much should one pay for a chip or a component? Lytica, a Canadian supply-chain pricing analytics company, has the answer. Founded by former Nortel chief procurement officer Ken Bradley, who, like many others in the IT industry, was once bemused by component pricing, Lytica…
Deep Dive Into AMD’s “Milan” Epyc 7003 Architecture
The “Milan” Epyc 7003 processors, the third generation of AMD’s revitalized server CPUs, is now in the field, and we await the entry of the “Ice Lake”
Overcoming Challenges In Next-Generation SRAM Cell Architectures
The Rise, Fall and Revival of AMD (2020)
AMD is one of the oldest designers of large scale microprocessors and has been the subject of polarizing debate among technology enthusiasts for nearly 50 years. Its...
Micron Abandons 3D XPoint Memory Technology
SVT: Six Stacked Vertical Transistors
SRAM cell architecture introduction: design and process challenges assessment.
Can Graviton Win A Three-Way Compute Race At AWS?
One of the main tenets of the hyperscalers and cloud builders is that they buy what they can and they only build what they must. And if they are building
7Kwafers.mp4 STDF data
over 7,000 wafers stacked (from STDF data)
Welcome to AMD ROCm Platform — ROCm Documentation 1.0.0 documentation
AMD ROCm documentation
The Third Time Charm Of AMD’s Milan Epyc Processors
With every passing year, as AMD first talked about its plans to re-enter the server processor arena and give Intel some real, much needed, and very direct
A brief history of router architecture
Here's what we've learnt about networks and the routers that interconnect them in the last 50 years.
Ladies And Gentlemen, Start Your Compute Engines
We have a bad case of the silicon shakes and a worsening deficiency in iron here at The Next Platform, but the good news is that new CPU processors from
Optical Antennas Promise ‘Unlimited’ Data Capacity
The breakthrough is taking full advantage of the orbital angular momentum properties of a coherent light source, thus enabling multiplexing.
Revenue per Wafer Climbs As Demand Surges for 5nm/7nm IC Processes
Despite high development costs, smaller nodes bring greater revenue per wafer.
Semiconductor Wafer Installed Capacity 2020
IC Insights recently released its new Global Wafer Capacity 2021-2025 report that provides details, analyses, and forecasts for IC industry capacity by wafer size, process geometry, region, and product type through 2025. Rankings of IC manufacturers by installed capacity for…
What Chip Startups Can Learn from Google’s TPU Design Team
The inception of Google’s effort to build its own AI chips is quite well known by now but in the interests of review, we’ll note that as early 2013 the
Report: Packaging Issues, PS5 Demand May Be Hurting TSMC Production - Extre
The hardware shortages currently hitting most of the PC market may be caused by a shortage in a necessary component in chip manufacturing, not low yields on TSMC's 7nm node.
AMD's Reliance on TSMC Isn't Harming the Company's Growth Prospects - Extre
CXL: Sorting Out The Interconnect Soup
How Compute Express Link provides a means of connecting a wide range of heterogeneous computing elements.
Understanding Wafer Bumping Packaging Technology - AnySilicon
Consumer electronics markets, the mobile phone market in particular, are extremely demanding. They are driven by the desire to pack more and more functionality and enhanced value into the same size handheld device, and often at lower costs. This drive towards smaller, cheaper…
Chipbond Website
Flexible Tape-and-Reel Circuit Substrate, High-end FPC, tape-and-reel, FPC, COF film, tape, single-piece packaging, Circuit Substrate,COF tape, tape film, substrate
Intel Processor Names, Numbers and Generation List
Understanding Intel® processor names and numbers helps identify the best laptop, desktop, or mobile device CPU for your computing needs.
The Ultimate Guide to Clock Gating
Clock Gating is defined as: “Clock gating is a technique/methodology to turn off the clock to certain parts of the digital design when not needed”. The Need for Clock Gating With most of the SoCs heavily constrained by power budgets, it is of utmost importance to reduce power…
6 Causes of MOS Transistor Leakage Current
Leakage current can contribute to power dissipation, especially at lower threshold voltages. Learn about six types of leakage current that can be found in MOS transistors.
Introduction to Phototransistors
In this series of articles, we’ll explore higher-output-current alternatives to photodiodes.
New Transistor Structures At 3nm/2nm
Gate-all-around FETs will replace finFETs, but the transition will be costly and difficult.
Intel Problems
Intel is in much more danger than its profits suggest; the problems are a long time in the making, and the solution is to split up the company.
Die Per Wafer (free) Calculator
How can you calculate the number of dies per wafer? A free online tool, DPW equation and reference to two other DPW calculators. Trusted by Amkor and GF.
The Ultimate Guide to Static Timing Analysis (STA)
Static Timing Analysis? Read here the best overview to STA, including theory, real examples, ilustrations, tips and tricks.
Introduction to Thermal Characterization Parameters
In this article, we’ll discuss another group of thermal data, called thermal characterization parameters denoted by the Greek letter Psi (Ψ).
Die Yield Calculator | iSine Analog, Digital & Mixed Signal IC Solutions
DIE YIELD CALCULATOR Use this online calculator to figure out die yield using Murphy’s model. You’ll need to know the die size, wafer diameter, and defect density. iSine is your complete resource for ASIC design – from concept to manufacturing and testing. We have expertise in…
Speculation Grows As AMD Files Patent for GPU Design
Long-time Slashdot reader UnknowingFool writes: AMD filed a patent on using chiplets for a GPU with hints on why it has waited this long to extend their CPU strategy to GPUs. The latency between chiplets poses more of a performance problem for GPUs, and AMD is attempting to…
Junction-to-Case Thermal Resistance in Thermal Design
Learn about an important thermal metric for designing the interface between an IC package and a heat sink.
Designing with a Heat Sink for Junction-to-Case Thermal Resistance
Watch the thermal measurement, junction-to-case thermal resistance, in action as we use it to calculate the thermal considerations for a given system.
AMD Patent Reveals Hybrid CPU-FPGA Design That Could Be Enabled By Xilinx T
Intel has been talking about on-processor FPGAs since 2014, but AMD's patent might actually result in one.
Atoms-Thick Transistors Get Faster Using Less Power
Research on 2D transistors for future electronics is forging ahead with different material favorites
10 basic advanced IC packaging terms to know
Engineers must keep pace with advanced IC packaging technology as it evolves rapidly, starting with understanding the basic terms.
Eight Major Steps to Semiconductor Fabrication, Part 7: The Metal Interconnect
In the last part of our series, we went over the thin-film process in which a semiconductor chip gets its electrical properties. But we need to ensure that
How Junction-to-Ambient Thermal Resistance of an IC Package Affects Thermal
Assessing the thermal performance of an IC package becomes easier if you understand this common, but often misapplied, parameter known as theta JA.
Semiconductor Assembly Glossary
Mythic Case Study
How Mythic got its optimized domain-specific core without compromises or delays.
https://www.edn.com/lost-in-the-advanced-ic-packaging-labyrinth-know-these-10-basic-terms/
What Makes 5G So Fast? mmWaves, MIMO, and Beamforming, and More
With 5G rolling out more quickly as we approach 2021, it may be helpful to touch on the key technologies that make 5G such a speedy success.
Transistor Sizing in VLSI Design Using the Linear Delay Model - Technical A
In this article, we will learn how to find the optimal size of a transistor/logic gate present in a larger circuit to provide the desired performance using the linear delay model.
List of semiconductor fabrication plants - Wikipedia
This is a list of semiconductor fabrication plants. A semiconductor fabrication plant is where integrated circuits (ICs), also known as microchips, are manufactured. They are either operated by Integrated Device Manufacturers (IDMs) that design and manufacture ICs in-house and…
What Is RF Integrated Circuit Design?
Learn the high-level steps behind RFIC design.
Re-Architecting SerDes
As implementations evolve to stay relevant, a new technology threatens to overtake SerDes.
What Designers Need to Know About Error Correction Code (ECC) In DDR Memori
How side-band, inline, on-die, and link error correcting schemes work and the applications to which they are best suited.
Netlist CDC. Why You Need it and How You do it. - Semiwiki
The most obvious question here is “why do I need…