DeepSeek open-sources Huawei chip tools as a simpler alternative to CUDA
‘Independent, self-controlled’: DeepSeek open-sources TileLang and six modules for Huawei’s Ascend chips, offered as an alternative to Nvidia’s CUDA.
gpus
ClusterMAX 3.0: The Industry Standard GPU Cloud Rating System Returns
In gory detail: reliability, performance, support, pricing—and, of course, security—in our most thorough analysis of GPU cloud providers globally.
The AI Inference Revolution Is Here
Today’s tidal wave of queries is forcing hardware makers to pivot
Note: ### The AI Inference Revolution Is Here [IEEE Spectrum article](#rid:1854764141) — a survey of how the shift from AI training to AI **inference** is reshaping chip and memory design. **The shift** Since 2020, the AI story was about training ever-bigger models. In 2026 the spotlight has moved to inference — putting trained models to work. People actually use LLMs now, reasoning models run…
CUDA from First Principles
Understanding Threads, Warps, Streaming Multiprocessors, and the Complete Kernel Execution Pipeline
China's AI Chip Landscape: A Complete Map of Who's Building What
From Huawei's Ascend to a wave of GPU startups — thirteen companies racing to replace Nvidia
A practical guide to running 8x RTX PRO 6000's
Maximize parallelism across 8x RTX PRO 6000's: high-concurrency inference, model fleets, and 70B fine-tuning.
AI Chip Architectures
A look at AI Chip Architectures. NVIDIA, AMD, TPUs, Trainium, Groq, Cerebras.
wafer-ai/gpu-perf-engineering-resources: A curriculum for learning about gpu performance engineering, from scratch to what the frontier AI…
A curriculum for learning about gpu performance engineering, from scratch to what the frontier AI labs do - wafer-ai/gpu-perf-engineering-resources
AI Accelerators: The Cambrian Explosion
A sample of the designs that followed Google's first Tensor Processing Unit.
let's talk more technical details about AMD's Helios! Anthropic just signed a $5B deal with AMD. and AMD's own version of GTC, Advancing…
let's talk more technical details about AMD's Helios! Anthropic just signed a $5B deal with AMD. and AMD's own version of GTC, Advancing AI, is happening today and tomorrow. the high level details are: 72 MI455X GPUs, 432GB of HBM4 each, and 2.9 exaflops of FP4. but the most…
The Practical Guide to LLM Inference on Consumer Hardware
The Practical Guide to LLM Inference on Consumer Hardware A practical walk through quantization, KV caches, Flash Attention, Mamba, MoE, and the runtimes that tie it all together — without the …
An Overview of AI Accelerators: MAC Operations, DRAM/SRAM, Performance Metrics, and Architecture
Learning from a classic AI accelerator - Eyeriss
CuPy – NumPy & SciPy for GPU — CuPy 14.0.1 documentation
A Coding Implementation to Master GPU Computing with CuPy, Custom CUDA Kernels, Streams, Sparse Matrices, and Profiling - MarkTechPost
Note: https://gist.github.com/bjpcjp/c85fa4214c1b59c3aa578a6e8e9d871c
NVIDIA’s V100, An 8-Year Old GPU, Now Sells for $100 and Crushes Modern Consumer Cards in AI LLM Workloads
The 8-year-old NVIDIA V100 outperformed the RTX 3060 and RX 7800 XT in AI LLMs, achieving 130 Tokens/s at only $200 total cost with mods.
Tech Industry Averages Just 5% GPU Utilization, Report Finds - Dataconomy
A report from Cast AI reveals that average GPU utilization in the tech industry is only 5%, indicating widespread inefficiency
xAI Is Reportedly Using Just 11% of Its 550,000 NVIDIA GPUs, While Meta and Google Squeeze Out 43-46% From Their Fleets
xAI is reportedly able to utilize just over 10% of its entire NVIDIA GPU fleet, as report suggests lackluster AI software stack optimizations.
Memory for AI Accelerators | American Compute
HBM, GDDR, and SRAM compared: how memory hierarchy, bandwidth, and capacity determine AI accelerator performance, cost, and which workloads each chip can serve.
prefill (processing the prompt), which is often compute-bound
decode (token-by-token generation), which is usually memory-bound
Tenstorrent’s Optimized AI Model, Running on Blackhole Servers, Generates 5-Sec Video In Just 2.4 Seconds
Tenstorrent has previewed its optimized AI model, which is powered by the Blackhole servers, offering blazing-fast video generation speeds.
Five ai compute architectures every engineer should know cpus gpus tpus npus and lpus compared
Modular: Software Pipelining for GPU Kernels: Part 1 - The Pipeline Problem
Flash Attention is a simple algorithm: tiled back-to-back matmuls with an online softmax algorithm in between. The algorithm fits in a few dozen lines of pseudocode. Yet Flash Attention 4's production kernel is 2,875 lines, and the hardest part to get right isn't the math. It's…
Anthropic's Compute Advantage: Why Silicon Strategy is Becoming an AI Moat
Why Anthropic’s integration into hyperscaler silicon programs may give it a lasting advantage in the economics of frontier AI.
Analyzing Nvidia GB10's GPU
Looking at Nvidia's latest effort to make a big iGPU
Taalas is replacing programmable GPUs with hardwired AI chips to achieve 17,000 tokens per second for ubiquitous inference - MarkTechPost
Why GPU Useful Life Is the Most Misunderstood Variable in AI Economics
Amazon shortened GPU depreciation while Meta extended it—same month, same technology. The $3.6B divergence exposes the accounting discretion behind AI infrastructure economics.
nvidia's B200 does 1,760 TFLOPS on a square GEMM and 4 TFLOPS on a skinny one. the shape of your matmul is the single biggest variable in…
NVIDIA Rubin Is The Most Advanced AI Platform On The Planet: Up To 50 PFLOPs With HBM4, Vera CPU With 88 Olympus Cores, And Delivers 5x…
NVIDIA is formally announcing its Rubin AI platform today which will be the heart of next-gen Data Centers, with a 5x upgrade over Blackwell.
Solving The Problems of HBM-on-Logic
Future AI Accelerators Might Need To Be Slower To Be Faster
This means a singular high-powered compute die consuming ~400W, with multiple 12-Hi HBM stacks.
peak GPU temperature of 69.1ºC, with the HBM silicon reaching around 60ºC in its worst case.
How Google’s TPUs are reshaping the economics of large-scale AI
TPUv7 offers a viable alternative to the GPU-centric AI stack has already arrived — one with real implications for the economics and architecture of frontier-scale training.
README | GPU Glossary
Beyond Von Neumann: Toward a unified deterministic architecture
The mechanism behind this is a time-resource matrix: A scheduling framework that orchestrates compute, memory and control resources across time. Much like a train timetable, scalar, vector and matrix operations move across a synchronized compute fabric without pipeline stalls or contention.
By predicting exactly when data will arrive — whether in 10 cycles or 200 — Deterministic Execution can slot dependent instructions into the right future cycle. This turns latency from a hazard into a schedulable event, keeping the execution units fully utilized and avoiding the massive thread and…
Amd instinct mix has forced nvidia to make changes with the rubin ai chip
Another Giant Leap: The Rubin CPX Specialized Accelerator & Rack
Nvidia announced the Rubin CPX, a solution that is specifically designed to be optimized for the prefill phase, with the single-die Rubin CPX heavily emphasizing compute FLOPS over memory bandwidth…
NVIDIA Unveils Its Newest ‘Rubin CPX’ AI GPUs, Featuring 128 GB GDDR7 Memory & Targeted …
NVIDIA has surprisingly unveiled a rather 'new class' of AI GPUs, featuring the Rubin CPX AI chip that offers immense inferencing power.
Tensordyne Claims 8x AI Efficiency Boost Over NVIDIA Using Logarithmic Math
The idea isn't novel, but presents major challenges. Tensordyne thinks it has solved them, and promises massive speed and efficiency gains as a result.
By using Logarithmic Number Systems (LNS), you can slash both the energy cost and silicon area cost of AI inference computations. How much? Tensordyne says that its upcom
Because AI compute is primarily composed of matrix multiplication, this radically simplifies the workload, and allows the functional units of Tensordyne's chip to be significantly smaller. In turn, more of the die can be SRAM cache (6x as much versus the competition), which improves both…
NVIDIA Blackwell Ultra “GB300” GPU, The Fastest AI Chip, Detailed: Dual Reticle GPU With Ove…
NVIDIA has provided an in-depth look at its fastest chip for AI, the Blackwell GB300, which is 50% faster than GB200 & packs 288 GB memory.
Writing Your First GPU Kernel in Python with Numba and CUDA - KDnuggets
80x Faster Python? Discover How One Line Turns Your Code Into a GPU Beast!
RDNA 4's "Out-of-Order" Memory Accesses
Examining RDNA 4's out-of-order memory accesses in detail, and investigating with testing
Understanding the Landscape of Ampere GPU Memory Errors
A100
67.77 million GPU device-hours across 10,693 GPUs.
Understanding the Landscape of Ampere GPU Memory Errors
Graphics Processing Units (GPUs) have become a de facto solution for accelerating high-performance computing (HPC) applications. Understanding their memory error behavior is an essential step toward achieving efficient and reliable HPC systems. In this work, we present a…
Demystifying GPUs: From Core Architecture to Scalable Systems
Table of Contents Motivation Optimization goal of GPUs Key concepts of GPUs - software and...
Demystifying NCCL: An In-depth Analysis of GPU Communication Protocols and Algorithms
The NVIDIA Collective Communication Library (NCCL) is a critical software layer enabling high-performance collectives on large-scale GPU clusters. Despite being open source with a documented API, i…
Performance, efficiency, and cost analysis of wafer-scale AI accelerators vs. single-chip GPUs
This review compares wafer-scale AI accelerators and single-chip GPUs in terms of performance, energy efficiency, and cost for high-performance AI applications. It highlights enabling technologies, such as CoWoS, and explores future directions including 3D integration, photonic…
Got juice? Future AI processors said to drink up to 15,360 watts of power — titanic requirements demand exotic immersion and embedded…
It is going to get hot.
The new AI calculus: Google’s 80% cost edge vs. OpenAI’s ecosystem
Explore the Google vs OpenAI AI ecosystem battle post-o3. Deep dive into Google's huge cost advantage (TPU vs GPU), agent strategies & model risks for enterprise
The Future of AI Accelerators: A Roadmap of Industry Leaders The AI… | Nader EL-Masri
The Future of AI Accelerators: A Roadmap of Industry Leaders The AI hardware race is heating up, with major players like NVIDIA, AMD, Intel, Google, Amazon, and more unveiling their upcoming AI accelerators. Here’s a quick breakdown of the latest trends: Key Takeaways: NVIDIA…
AMD's Strix Halo - Under the Hood
Hello you fine Internet folks,
Understanding PTX, the Assembly Language of CUDA GPU Computing | NVIDIA Technical Blog
Parallel thread execution (PTX) is a virtual machine instruction set architecture that has been part of CUDA from its beginning. You can think of PTX as the…
We Were Wrong About GPUs
Do my tears surprise you? Strong CEOs also cry.
Demystifying GPU Compute Architectures
Getting 'low level' with Nvidia and AMD GPUs