The Floppy Disk of Floating Point
An essay that bids farewell to x87 – a computing architecture too long for this world.
semiconductors
Understanding SoC Clock Design - AnySilicon
SoC clock tree overview, metrics that help qualify a clock tree and most commonly used clock tree distribution methodologies.
What is a Probe Card? - AnySilicon
A probe card is essentially an interface or a board that is used to perform wafer test for a semiconductor wafer. It is used to connect to the integrated circuits located on a wafer to the ATE (Automated Test Equipment) in order to test their electrical parameters and…
Overview and Types of Capacitors in ASIC Design - AnySilicon
Learn more on the various capacitors in ASIC design that can improve your chip performance and recude it's cost.
Category:EDA file formats
File formats used by EDA tools.
How FPGAs work, and why you'll buy one
Software optimization resources. C++ and assembly. Windows, Linux, BSD, Mac OS X
Software optimization manuals for C++ and assembly code. Intel and AMD x86 microprocessors. Windows, Linux, BSD, Mac OS X. 16, 32 and 64 bit systems. Detailed descriptions of microarchitectures.
An Introduction to Semiconductor Physics, Technology, and Industry
Standard Test Data Format
Standard Test Data Format (STDF) is a proprietary file format for semiconductor test information originally developed by Teradyne, but it is now a de facto standard widely used throughout the semiconductor industry. It is a commonly used format produced by automatic test…
Memory at the Core of New Deep Learning Research Chip
Over the last two years, there has been a push for novel architectures to feed the needs of machine learning and more specifically, deep neural networks.
Design and Analysis of Stability-Guaranteed PUFs
The lack of stability is one of the major limitations that constrains PUF from being put in widespread practical use. In this paper, we propose a weak PUF and a strong PUF that are both completely...
Analog Technical Articles - Electrical Engineering & Electronics Technical Articles
Read the latest Analog Electronic & Electrical Engineering Technical Articles
Describing Combinational Circuits in Verilog - Technical Articles
This article introduces the techniques for describing combinational circuits in Verilog by examining how to use the conditional operator to describe combinational truth tables.
Understanding and Addressing 5 Key Power Supply Issues - Industry Articles
This article will take a deeper look at five key power supply problems, how to know when they arise, and the best ways to address or mitigate them.
R2: What it Means to be 1 Less Than S3 - by Doug (mule) - Fabricated Knowle
In the battle of bandwidth and compute, Cloudflare has a strong hand. A dive into networking infrastructure.
Lam Research, Tokyo Electron, JSR Battle It Out In The $5B+ EUV Photoresist, Coater and Developer Market - CAR vs MOR vs Dry Resist
There is a battle brewing in the photoresist, coater, and developer market due to EUV advancement. This battle could cost Tokyo Electron their dominance over a $5B+ annual revenue market and lead to some photoresist companies such as TOK to lose a major market. JSR and Tokyo are…
The Rising Tide of Semiconductor Cost - by Doug (mule) - Fabricated Knowled
It Isn't Transistory
Semiconductor Wafer Installed Capacity Per Process Node
Combined, China and Taiwan would hold about 37% of global IC capacity, almost 3x that of North America. IC Industry at Heart of Possible China Takeover of Taiwan
A friendly introduction to machine learning compilers and optimizers
[Twitter thread, Hacker News discussion]
Does an AMD Chiplet Have a Core Count Limit?
Did IBM Just Preview The Future of Caches?
Next-Gen Chips Will Be Powered From Below
Buried interconnects will help save Moore's Law
Impact Of GAA Transistors At 3/2nm
Some things will get better from a design perspective, while others will be worse.
The Novel Material That’s Shrinking Phone Chargers, Powering Up Electric Cars, and Making 5G Possible
Gallium, once an industrial-waste product, is transforming our increasingly electrified world.
Gutting Decades Of Architecture To Build A New Kind Of Processor
There are some features in any architecture that are essential, foundational, and non-negotiable. Right up to the moment that some clever architect shows
How Intel Financialized and Lost Leadership in Semiconductor Fabrication |
Intel is the poster child of how stock buybacks come at the cost of technological innovation.
What Does It Take To Build A Successful Multi-Chip Module Factory?
Using yield analytics and consolidated data to power your factory.
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Xoilac TV Thiên Đường Bóng Đá Trực Tiếp Xoilac 90P
Xoilac - Thiên đường bóng đá trực tuyến. Hãy cùng chúng tôi khám phá thêm về sự chuyên nghiệp và tận tâm trong dịch vụ chăm sóc khách hàng mà trang mang lại!
Let’s Build a Chip – With Math
Let’s Build a Chip – We lay out the costs of building a chip – with spreadsheets!
A Look at Baidu’s Industrial-Scale GPU Training Architecture
Like its U.S. counterpart, Google, Baidu has made significant investments to build robust, large-scale systems to support global advertising programs. As
Tenstorrent Wormhole Analysis – A Scale Out Architecture for Machine Learni
Mythic Resizes its AI Chip
Its second analog AI chip is optimized for different card sizes, but still aimed at computer vision workloads at the edge.
What Happens When Multipliers No Longer Define AI Accelerators?
Current custom AI hardware devices are built around super-efficient, high performance matrix multiplication. This category of accelerators includes the
Bumps Vs. Hybrid Bonding For Advanced Packaging
New interconnects offer speed improvements, but tradeoffs include higher cost, complexity, and new manufacturing challenges.
AMD 3D Stacks SRAM Bumplessly
AMD recently unveiled 3D V-Cache, their first 3D-stacked technology-based product. Leapfrogging contemporary 3D bonding technologies, AMD jumped directly into advanced packaging with direct bonding and an order of magnitude higher wire density.
Intel: AMD Threat Is Finished (NASDAQ:INTC)
Although competition from Arm is increasing, AMD remains Intel’s biggest competitor, as concerns of losing market share weigh on Intel’s valuation.
As Chips Shrink, Rowhammer Attacks Get Harder to Stop
A full fix for the “Half-Double” technique will require rethinking how memory semiconductors are designed.
1nm Breakthrough: TSMC, MIT and NTU Published on Nature
New 'Morpheus' CPU Design Defeats Hundreds of Hackers in DARPA Tests - Extr
A new CPU design has won accolades for defeating the hacking efforts of nearly 600 experts during a DARPA challenge. Its approach could help us close side-channel vulnerabilities in the future.
Google details new AI accelerator chips
Google detailed TPUv4 at Google I/O 2021. They're accelerator chips that deliver high performance on AI workloads.
Circuit Synthesis for Analog Computing | SIGPLAN Blog
Modern analog computers offer unique programming challenges which make them challenging compilation targets. How do we automatically program an analog computer to implement a computation?
2021 Perception Sensor Industry Map: 75 Companies Powering Vision-Enabled Platforms | By Tangram Vision
The 2021 Perception Sensor Industry Map: Depth Sensing, LiDAR, CMOS, IMU, Software and More.
Untether AI: At Memory Computation A Transformative Compute Architecture for Inference Acceleration
Presented by Robert Beachler, VP of Product, Untether AI. Traditional processor architectures are failing to keep up with the exploding compute demands of AI workloads. They are limited by the power-hungry weight-fetch of von Neumann architectures and limitations of transistor…
11 Ways To Reduce AI Energy Consumption
Pushing AI to the edge requires new architectures, tools, and approaches.
More Data Drives Focus On IC Energy Efficiency
Decisions that affect how, when, and where data gets processed.
Apple's M1 Positioning Mocks the Entire x86 Business Model
Apple is positioning its M1 quite differently from any CPU Intel or AMD has released. The long-term impact on the PC market could be significant.
Sapphire Rapids CPU Leak: Up to 56 Cores, 64GB of Onboard HBM2
Sapphire Rapids, Intel's next server architecture, looks like a large leap over the just-launched Ice Lake SP.
First Google-Sponsored MPW Shuttle Launched at SkyWater with 40 Open Source
BLOOMINGTON, Minn. and SAN JOSE, Calif. – April 6, 2021 – SkyWater Technology, the trusted technology realization partner, and Efabless, a crowdsourcing design platform for custom silicon, today announced the first tapeout in a series of Google-sponsored open source…
GPU Nomenclature History: No Shortage of GPUs Here
What makes a GPU a GPU, and when did we start calling it that? Turns out that’s a more complicated question than it sounds.