Low-Power AI Startup Eta Compute Delivers First Commercial Chips

The firm pivoted away from riskier spiking neural networks using a new power management scheme

The firm pivoted away from riskier spiking neural networks using a new power management scheme

EE Times Compares SRAM vs. DRAM, Common Issues With Each Type Of Memory, And Takes A Look At The Future For Computer Memory.
An integrated cache and memory access time, cycle time, area, leakage, and dynamic power model - HewlettPackard/cacti
This article looks at gallium arsenide, comparing it to other semiconductor materials, and explores how different compounds are used in components.

As we previously reported, Google unveiled its second-generation TensorFlow Processing Unit (TPU2) at Google I/O last week. Google calls this new
What are TMR sensors and what applications are they best suited to? This article provides a snapshot of this sensor type and what TMR-based components are available for designers.

Nvidia has staked its growth in the datacenter on machine learning. Over the past few years, the company has rolled out features in its GPUs aimed neural
Fast parallel CTC.

Four years ago, Google started to see the real potential for deploying neural networks to support a large number of new services. During that time it was

D&R provides the world's largest directory of Silicon IP (Intellectual Property), SoC Configurable Design Platforms and SOPC Products from 400 vendors
This article will help the reader understand the different types of power semiconductors: how they work, their key parameters, and trade-offs.
The modern GPU compute engine is a microcosm of the high performance computing datacenter at large. At every level of HPC – across systems in the

PARIS — If you’ve ever seen the U.S. TV series “Person of Interest,” during which an anonymous face in the Manhattan crowd, highlighted inside a digital
This blog post is in response to a recent topic on the Parallella forum regarding Adapteva’s chip cost efficiency (GFLOPS/$): [forum discussion thread]. I had to be a little vague on some poi…
Explore semiconductor IP, white papers, news, technical articles and more from hundreds of top semiconductor IP vendors and foundries.
Magic VLSI: Resource Page

An effective interconnect makes delivering a complex SoC easier, more predictable, and less costly.
Explore Synopsys Blog for the latest insights and trends in EDA, IP, and Systems Design. Stay updated with expert articles and industry news.

Innovative new clocking schemes in the latest LPDDR standard enable easier implementation of controllers and PHYs at maximum data rate as well as new options for power consumption.
Silvaco provides standard cell library design and optimization services

5G Beamforming Antennas Create Design, Test Problems Assuring quality under changing conditions with shifting standards and use models is a major challenge.

I have written a lot of articles looking at leading…

Currently there are more than 100 companies all over the world building ASIC’s (Application specific integrated circuit) or SOC’s (System…
This article introduces a phase-based feedback system that plays an important role in many applications.

How to build a multi-chip neural model with minimal overhead.
This tutorial describes methods to enable efficient processing for deep neural networks (DNNs), which are used in many AI applications including computer vision, speech recognition, robotics, etc....

Getting data in and out of memory faster is adding some unexpected challenges.

PALO ALTO, Calif., August 19, 2019 — UPMEM announced today a Processing-in-Memory (PIM) acceleration solution that allows big data and AI applications to run 20 times faster and with 10 […]

Experts at the Table: Which type of DRAM is best for different applications, and why performance and power can vary so much.

Evaluate inference accelerators to find the best throughput for the money.
Cheaper than gallium arsenide. More flexible band-gap tuning than silicon. What's silicon germanium's place in circuit design?

Lidar is essential for self-driving cars—here’s how some leading lidar sensors work.
This technical brief attempts to dispel some of the fog surrounding the three-character naming convention used to describe ceramic caps.
This article will discuss the basic concepts of clock gating and how it can be used to reduce the power consumption of synchronous digital systems.

The new technology is 10 times as reliable as what's come before for keeping internet-connected devices secure.

We talked to lidar company executives and independent experts.
This article focuses on using Verilog to describe synchronous sequential circuits.

Emerging memory technologies call for an integrated PVD process system capable of depositing and measuring multiple materials under vacuum.
This article explains how a PLL can be used to produce a high-frequency clock from a low-frequency reference signal.

A detailed, critical, technical essay on upcoming CPU architectures.

The BAIR Blog
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This article will take a closer look at the commands used to control and interact with DRAM.