To ensure that designers have the right tools for the job, TSMC announced a slew of EDA tool certifications for its most advanced processes—ranging from 3 nm nodes to 3D semiconductor integration.
Extrinsic semiconductors have been doped with specific chemicals. This process helps to modify the electrical properties of a relatively pure semiconductor crystal.
Advanced etch holds key to nanosheet FETs; evolutionary path for future nodes.
The latest American trade restrictions could significantly set back China’s semiconductor ambitions.
Using new materials, UPenn researchers recently demonstrated how analog compute-in-memory circuits can provide a programmable solution for AI computing.
How do we keep track of time? A deeper look into Quartz timers and the emerging field of MEMS
A new technical paper titled “HiRA: Hidden Row Activation for Reducing Refresh Latency of Off-the-Shelf DRAM Chips” was published by researchers at ETH Zürich, TOBB University of Economics and Technology and Galicia Supercomputing Center (CESGA). Abstract “DRAM is the building…
Absolute Reticle Limit
Changes are steady in the memory hierarchy, but how and where that memory is accessed is having a big impact.
A vast majority of modern digital integrated circuits are synchronous designs. They rely on storage elements called registers or flip-flops, all of which change their stored data in a lockstep manner with respect to a control signal called the clock. In many ways, the clock…
Long Term agreements, particularly the NCNR order is a relative newcomer this cycle. Let's see how they are holding up. The Industry Structure is showing that Fabs are in charge.
Our analysis of 14 popular consumer devices found most could stop working in 3 to 4 years because of irreplaceable batteries. Here’s how we get the tech industry to design products that last longer — and do less damage to the environment.
Google announced in a blog on August 3 that GlobalFoundries (GF) is participating in its open-source silicon initiative as a new partner, calling the new partnership a milestone in the foundry ecosystem market.
Google is promoting the growth of open source tools for designing semis. The science fiction version of this story leads to everyone designing chips, the reality is going to be much narrower, but s…
Over the last two years, Google and SkyWater Technology have partnered to make building open silicon accessible to all developers
R&D leaders can boost productivity by using advanced analytics to create stronger, faster engineering teams.
Both companies are rolling out mitigations, but they add overhead of 12 to 28 percent.
Moore's law has slowed down and, with the rise of data-intensive applications, like machine learning, new approaches to computing hardware are needed. The perspective explores the role of memristive,...
Let's learn more about the world's most important manufactured product. Meaningful insight, timely analysis, and an occasional investment idea.
Ayar Labs solves bandwidth and power bottlenecks by moving data using light. We built the world's first optical I/O chiplets.
Intel® Silicon Photonics combines the manufacturing scale and capability of silicon with the power of light onto a single chip.
Intel Lab researchers push photonics one step further by demonstrating a tightly controlled, highly integrated eight-wavelength laser.
Intel has demonstrated an eight-wavelength laser array on a silicon wafer paving the way for the next generation of integrated silicon photonics products.
Microelectromechanical systems (MEMS) vibratory gyroscopes can be a bit mysterious and math-intensive. Let's break the math down, and go over gyroscope basics and structures.
Get a high-level introduction to how standards play into the EE world.
Hertzbleed attack targets power-conservation feature found on virtually all modern CPUs.
PCI-SIG has drafted the PCIe 7.0 spec and aims to finalize it in 2025.
The high frequencies and data rates involved in 5G designs makes layout verification all the more important.
Challenge to create GaN-based 400V photovoltaic power supply
New technical paper titled “Bridging the Gap between Design and Simulation of Low-Voltage CMOS Circuits” from researchers at Federal University of Santa Catarina, Brazil. Abstract “This work proposes a truly compact MOSFET model that contains only four parameters to assist an…
New technical paper titled “A Review on Transient Thermal Management of Electronic Devices” from researchers at Indian Institute of Technology Bombay. Abstract “Much effort in the area of electronics thermal management has focused on developing cooling solutions that cater to…
Star Trek's glowing circuit boards may not be so crazy
A century later, Nikola Tesla’s dream comes true
The researchers are considered a key to the company’s future. But they have had a hard time shaking infighting and controversy over a variety of issues.
When you’re baking a cake, it’s hard to know when the inside is in the state you want it to be. The same is true—with much higher stakes—for microelectronic chips: How can engineers confirm that what’s inside has truly met the intent of the designers? How can a semiconductor…
Target is 20kV, to protect electric grid from electromagnetic pulse
Challenges and troubleshooting employed to design a 2048-chiplet, 14,336-core waferscale processor system.
Semiconductor Engineering's collection of technical papers for the chip industry.
In 2004 I was working for Microsoft in the Xbox group, and a new console was being created. I got a copy of the detailed descriptions of the Xbox 360 CPU and I read it through multiple times and su…
There are two types of packaging that represent the future of computing, and both will have validity in certain domains: Wafer scale integration and