TSMC’s 3nm yield rate reportedly just 55% · TechNode
TSMC is struggling with its new 3nm process, with the semiconductor giant's yield rate reportedly far below the standard expected.
semiconductors
AMD’s Radeon Instinct MI210: GCN Lives On
AMD, Nvidia, and Intel have all diverged their GPU architectures to separately optimize for compute and graphics.
Atomera Plans to Breathe New Life into Older Chip Manufacturing
Atom-thin layers of oxygen in a chip’s silicon can make devices speedier and more reliable
What is an Image Processor? Turns Out the Answer is Hazy
Real-time image processing is a resource-intensive task that often requires specialized hardware. With that in mind, let's explore processors that are designed specifically for photo and video applications.
Mitigating Electromigration In Chip Design
The interplay between current density, temperature, and material properties.
Lossy Transmission Lines: Introduction to the Skin Effect
This article introduces high-frequency conductor losses in transmission lines caused by a phenomenon known as the skin effect.
‘An Act of War’: Inside America’s Silicon Blockade Against China
The Biden administration thinks it can preserve America’s technological primacy by cutting China off from advanced computer chips. Could the plan backfire?
Gallery of Processor Cache Effects
Kryo: Qualcomm’s Last In-House Mobile Core
CPU design is hard.
AI Capacity Constraints - CoWoS and HBM Supply Chain
Quarterly Ramp for Nvidia, Broadcom, Google, AMD, AMD Embedded (Xilinx), Amazon, Marvell, Microsoft, Alchip, Alibaba T-Head, ZTE Sanechips, Samsung, Micron, and SK Hynix
Micron to Introduce GDDR7 Memory in 1H 2024
GDDR7 is getting closer, says Micron.
Micron Announces GDDR7 for GPUs Coming in First Half of 2024
Though it'll arrive just in time for mid-cycle refresh from AMD, Nvidia, and Intel, it's unclear if there will be any takers just yet.
FinFETs: The Ultimate Guide
Introduction to FinFETs In the quest for smaller, faster, and more power-efficient electronic devices, the evolution of semiconductor technology has been relentless. One significant milestone in this journey has been the advent of FinFETs (Fin Field-Effect Transistors). FinFETs…
The chip patterning machines that will shape computing’s next act
The first lithography tools were fairly simple, but the technologies that produce today’s chips are among humankind’s most complex inventions.
AI Server Cost Analysis – Memory Is The Biggest Loser
Micron $MU looks very weak in AI
Panmnesia speeds up vector search with CXL
Panmnesia has devised CXL-based vector search methods that are much faster than Microsoft’s Bing and Outlook.
WIN Semiconductors Releases Next Generation mmWave Enhancement/Depletion Ga
PQG3-0C platform integrates optimized power and low noise transistors, PN diodes, E/D logic and RF switches on a chip to meet mmWave performance requirements
AMD Expands AI/HPC Product Lineup With Flagship GPU-only Instinct Mi300X wi
The Third Time Charm Of AMD’s Instinct GPU
The great thing about the Cambrian explosion in compute that has been forced by the end of Dennard scaling of clock frequencies and Moore’s Law lowering
Smart TV industry rocked by alleged patent conspiracy from chip maker
Lawsuit: Patent trolls created “harmful illusion” of unstable TV-chip market.
Intel Is All-In on Back-Side Power Delivery
The company’s PowerVia interconnect tech demonstrated a 6 percent performance gain
The Ultimate Guide for Optimal SoC Floorplan
Floorplanning plays a crucial role in the physical design of an SoC and lays the foundation for an efficient and high-performance ASIC layout. In this article, we will discuss ten essential floorplanning commandments that physical design engineers can follow to ensure a…
The Case for Running AI on CPUs Isn’t Dead Yet
GPUs may dominate, but CPUs could be perfect for smaller AI models
ARM’s Cortex A53: Tiny But Important
Tech enthusiasts probably know ARM as a company that develops reasonably performant CPU architectures with a focus on power efficiency.
Intel CPU Die Topology - by Jason Rahman - Delayed Branch
Over the past 10-15 years, per-core throughput increases have slowed, and in response CPU designers have scaled up core counts and socket counts to continue increasing performance across generations of new CPU models.
Photonic Chips Curb AI Training’s Energy Appetite
Stanford team achieves first-ever optical backpropagation milestone
Google dives into the ‘supercomputer’ game by knitting together purpose-bui
Google's new machines combine Nvidia H100 GPUs with Google’s high-speed interconnections for AI tasks like training very large language models.
3D DRAM could be revolutionary – if it works
We asked memory semiconductor industry analyst Jim Handy of Objective Analysis how he views 3D DRAM technology.
Tech Tuesday: Silicon Assurance
A Gainesville-based tech company is developing new ways to try to make our phones, laptops and other devices safe from bad actors.
GaN HEMT Circuit Topologies for High-resolution LiDAR
Learn about gallium-nitride (GaN) high electron mobility transistors (HEMTs) and how they can be used in LiDAR (light detection and ranging) applications.
TSMC Announces Early Access Nodes for Next-Gen Car Chips: N4AE and N3AE
TSMC Details 3nm Evolution: N3E On Schedule, N3P and N3X To Deliver 5% Perf
Salience Labs advances its AI agenda using new chip design
Vaysh Kewada, CEO and Co-Founder of Salience Labs, advances AI by circumventing finite processing power with a revolutionary new chip design.
Memory Roundup: Ultra-low-power SRAM, ULTRARAM, & 3D Flash Hit the Scene
New memory technologies have emerged to push the boundaries of conventional computer storage.
State of the Art And Future Directions of Rowhammer (ETH Zurich)
A new technical paper titled “Fundamentally Understanding and Solving RowHammer” was published by researchers at ETH Zurich. Abstract “We provide an overview of recent developments and future directions in the RowHammer vulnerability that plagues modern DRAM (Dynamic Random…
Latest GaN ICs Crank out More Speed, Efficiency, and Power Density
Leveraging gallium nitride (GaN) technology, the latest batch of power devices boast improved performance, high efficiency, and low design costs.
How To Plan And Conduct Highly Accelerated Life Testing
Uncover design and construction weaknesses by applying increased stressors to force failures.
RF Energy Harvesting and Wireless Power Transfer Technologies: Latest Techn
A new technical paper titled “RF Energy Harvesting and Wireless Power Transfer for Energy Autonomous Wireless Devices and RFIDs” was published by researchers at Institut Polytechnique de Paris, Universidade de Aveiro, The Hague, McGill University, University of Bordeaux…
4 Ways to Put Lasers on Silicon - IEEE Spectrum
You can make many things with silicon photonics, but a laser is not one of them
The Future of the Transistor
Planar to FinFET to Nanosheet to Complementary FET to 2D
Google’s TPU v4 Architecture: 3 Major Features
A new technical paper titled “TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings” was published by researchers at Google. Abstract: “In response to innovations in machine learning (ML) models, production workloads changed…
Samsung steps up fan-out wafer-level packaging deployment
Samsung Electronics has stepped up its deployment in the fan-out (FO) wafer-level packaging segment with plans to set up related production lines in Japan, according to industry sources.
Hacker News
While microprocessors are used in various applications, they are precluded from the use in high-energy physics applications due to the harsh radiation present. To overcome this limitation a...
Interconnect Under the Spotlight as Core Counts Accelerate - SemiWiki
In the march to more capable, faster, smaller, and lower…
Ending an Ugly Chapter in Chip Design
Study tries to settle a bitter disagreement over Google’s chip design AI
Growth of 300mm fab capacity picks up pace again - Bits&Chips
After dipping this year, the growth of 300mm semiconductor manufacturing capacity is set to gain momentum.
RISC-V In The Datacenter Is No Risky Proposition
It was only a matter of time, perhaps, but the skyrocketing costs of designing chips is colliding with the ever-increasing need for performance,
True 3D Is Much Tougher Than 2.5D
While terms often are used interchangeably, they are very different technologies with different challenges.
RDL and Flip Chip Design
RDL, an abbreviation for Redistribution Layer, that is, to make one or more layers of metal on the active chip side to redistribute the pins of the chip.
The Most Complex Chip Ever Made?
Historically Intel put all its cumulative chip knowledge to work advancing Moore's Law and applying those learnings to its future CPUs. Today, some of