Real-time image processing is a resource-intensive task that often requires specialized hardware. With that in mind, let's explore processors that are designed specifically for photo and video applications.
The interplay between current density, temperature, and material properties.
This article introduces high-frequency conductor losses in transmission lines caused by a phenomenon known as the skin effect.
The Biden administration thinks it can preserve America’s technological primacy by cutting China off from advanced computer chips. Could the plan backfire?
CPU design is hard.
Quarterly Ramp for Nvidia, Broadcom, Google, AMD, AMD Embedded (Xilinx), Amazon, Marvell, Microsoft, Alchip, Alibaba T-Head, ZTE Sanechips, Samsung, Micron, and SK Hynix
GDDR7 is getting closer, says Micron.
Though it'll arrive just in time for mid-cycle refresh from AMD, Nvidia, and Intel, it's unclear if there will be any takers just yet.
Introduction to FinFETs In the quest for smaller, faster, and more power-efficient electronic devices, the evolution of semiconductor technology has been relentless. One significant milestone in this journey has been the advent of FinFETs (Fin Field-Effect Transistors). FinFETs…
The first lithography tools were fairly simple, but the technologies that produce today’s chips are among humankind’s most complex inventions.
Micron $MU looks very weak in AI
Panmnesia has devised CXL-based vector search methods that are much faster than Microsoft’s Bing and Outlook.
PQG3-0C platform integrates optimized power and low noise transistors, PN diodes, E/D logic and RF switches on a chip to meet mmWave performance requirements
The great thing about the Cambrian explosion in compute that has been forced by the end of Dennard scaling of clock frequencies and Moore’s Law lowering
Lawsuit: Patent trolls created “harmful illusion” of unstable TV-chip market.
The company’s PowerVia interconnect tech demonstrated a 6 percent performance gain
Floorplanning plays a crucial role in the physical design of an SoC and lays the foundation for an efficient and high-performance ASIC layout. In this article, we will discuss ten essential floorplanning commandments that physical design engineers can follow to ensure a…
GPUs may dominate, but CPUs could be perfect for smaller AI models
Tech enthusiasts probably know ARM as a company that develops reasonably performant CPU architectures with a focus on power efficiency.
Over the past 10-15 years, per-core throughput increases have slowed, and in response CPU designers have scaled up core counts and socket counts to continue increasing performance across generations of new CPU models.
Stanford team achieves first-ever optical backpropagation milestone
Google's new machines combine Nvidia H100 GPUs with Google’s high-speed interconnections for AI tasks like training very large language models.
We asked memory semiconductor industry analyst Jim Handy of Objective Analysis how he views 3D DRAM technology.
A Gainesville-based tech company is developing new ways to try to make our phones, laptops and other devices safe from bad actors.
Learn about gallium-nitride (GaN) high electron mobility transistors (HEMTs) and how they can be used in LiDAR (light detection and ranging) applications.
Vaysh Kewada, CEO and Co-Founder of Salience Labs, advances AI by circumventing finite processing power with a revolutionary new chip design.
New memory technologies have emerged to push the boundaries of conventional computer storage.
A new technical paper titled “Fundamentally Understanding and Solving RowHammer” was published by researchers at ETH Zurich. Abstract “We provide an overview of recent developments and future directions in the RowHammer vulnerability that plagues modern DRAM (Dynamic Random…
Leveraging gallium nitride (GaN) technology, the latest batch of power devices boast improved performance, high efficiency, and low design costs.
Uncover design and construction weaknesses by applying increased stressors to force failures.
A new technical paper titled “RF Energy Harvesting and Wireless Power Transfer for Energy Autonomous Wireless Devices and RFIDs” was published by researchers at Institut Polytechnique de Paris, Universidade de Aveiro, The Hague, McGill University, University of Bordeaux…
You can make many things with silicon photonics, but a laser is not one of them
Planar to FinFET to Nanosheet to Complementary FET to 2D
A new technical paper titled “TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings” was published by researchers at Google. Abstract: “In response to innovations in machine learning (ML) models, production workloads changed…
Samsung Electronics has stepped up its deployment in the fan-out (FO) wafer-level packaging segment with plans to set up related production lines in Japan, according to industry sources.
While microprocessors are used in various applications, they are precluded from the use in high-energy physics applications due to the harsh radiation present. To overcome this limitation a...
In the march to more capable, faster, smaller, and lower…
Study tries to settle a bitter disagreement over Google’s chip design AI
After dipping this year, the growth of 300mm semiconductor manufacturing capacity is set to gain momentum.
It was only a matter of time, perhaps, but the skyrocketing costs of designing chips is colliding with the ever-increasing need for performance,
While terms often are used interchangeably, they are very different technologies with different challenges.
RDL, an abbreviation for Redistribution Layer, that is, to make one or more layers of metal on the active chip side to redistribute the pins of the chip.
Historically Intel put all its cumulative chip knowledge to work advancing Moore's Law and applying those learnings to its future CPUs. Today, some of
Intel's multi-die interconnect bridge (EMIB) is an approach to in-package high-density interconnect of heterogeneous chips.
Powered by the promises of the CHIPS Act, Intel is investing more than $100 billion to increase domestic chip manufacturing capacity and capabilities.
USC researchers have announced a breakthrough in memristive technology that could shrink edge computing for AI to smartphone-sized devices.